The present invention relates to an apparatus for and a method of surface treatment for carrying out dry etching, surface cleaning, thin film deposition and the like, and more particularly to an apparatus for and a method of surface treatment suitable for pattern delineation of microelectronic devices such as semiconductor integrated circuits.
Surface treatment techniques such as etching, surface cleaning and deposition utilizing plasma have ben widely used in fabrication processes for electronic devices such as semiconductor integrated circuits in recent years.
These techniques are called dry processes in general, and claimed advantages exist in that surface treatment is possible at low temperatures, the processes are able to delineate very fine patterns, and so forth. Particularly, the dry etching technique is an indispensable technique for delineating very fine patterns of semiconductor integrated circuits, in that pattern delineation on thin film materials can be done without pattern width shift from the mask width by making the most of directional movement of ions from plasma.
In such a process utilizing plasma, however, various radiation damage is are caused on a specimen because of the facts that the energy of particles which are incident on the specimen is high, particles have electric charge, and so forth.
In particular, a problem of degradation of a thin insulating film is caused by an electric charge of particles that is accumulated on a specimen surface and a large current flows further in an element and a thin film in the specimen is a serious problem attended with plasma treatment as reported in "Solid State Technology", 27 (1984) pp. 263-266 and "Extended Abstracts of the 19th Conference on Solid State Devices and Materials", Tokyo (1987) pp. 195-198. This problem becomes more and more important because an insulating film constituting an element becomes very thin with the development of refinement of elements for the future.
Degradation of an insulating film by means of a plasma process as described above is generated because a large quantity of charged particles such as ions and electrons are incident on a specimen from plasma.
Therefore, the present inventor et al. have developed a technique of carrying out etching with a neutral beam without having charged particles be incident on a specimen surface by an apparatus and a method disclosed in JP-A-61-248428 and JP-A-62-259443.
In this system, an ion beam extracted from plasma by accelerating to desired kinetic energy, e.g., several hundred eV, is made to pass through a gas at 10.sup.-2 -10.sup.-4 Torr, a part of the ion beam is converted into a neutral beam by charge exchange reactions with atoms and molecules in the gas, residual ions are repelled to proceed by means of appropriate electric field or magnetic field which is applied in front of the specimen, and only the neutral beam is radiated onto the specimen.
A gas containing halogen such as Cl.sub.2 is supplied at the same time so as to be adsorbed on the specimen surface. Thus, a chemical reaction between halogen and a surface material is proceeded at a location where a neutral beam at several hundred eV is radiated and etching of the surface can be proceeded by converting the surface material into a volatile material such as halide.
Since only electrically neutral particles are incident on the specimen in a system described above, it has been confirmed that almost no charge build-up is produced on the surface and thus almost no degradation in breakdown voltage of a thin insulating film contained in a semiconductor element and the like is generated.
Etching can be applied to variety of materials such as Si, SiO.sub.2, Si.sub.2 N.sub.4, WSi.sub.2, TiN and Al forming semiconductor integrated circuits by this method.
Rare gas atoms such as Ne and Ar may be used principally as a neutral beam, and an appropriate gas may be selected among Cl.sub.2, F.sub.2, XeF.sub.2, CCl.sub.4, NF.sub.3, BCl.sub.3 and so on depending on a material to be etched as a reactive gas supplied to the specimen surface.
Since etching reaction is proceeded only at a location irradiated with a neutral beam, etching is applied along a direction of the neutral beam and highly precise pattern delineation can be realized without etching pattern width shift.
As a result of study for putting neutral beam etching described above to practical use, following problems have been revealed.
A first problem is that the etching rate is very low. For example, in case Si was etched with a neutral beam of Ar and a Cl.sub.2 gas, the etching rate was 30 nm/min at most, and when SiO.sub.2 was etched with a neutral beam of Ar and a CHF.sub.3 gas, the etching rate was about 10 nm/min.
These values are one to two orders of magnitude smaller as compared with an etching rate by a plasma etching technique employed in a present fabrication process of semiconductor integrated circuits, and this technology cannot be adopted as it is as a production technology in mass-production.
Incidentally, a technology in which a gas composed of molecules containing halogen is formed into plasma by glow discharge in advance outside of a vacuum chamber of an apparatus for surface treatment and fragment molecules and radicals in the ga which has been formed into plasma are introduced proximately to a specimen has been disclosed in JP-A-62-291032 by the present inventor et al.
It has also been disclosed in this official gazette that the surface reaction of the specimen is enhanced by introducing fragment molecules and radicals proximately to the specimen.
As to the contents disclosed therein, however, the present inventor has found that enhancement of the surface reaction of the specimen is not necessarily sufficient probably because of the fact that processing to form a gas into plasma is carried out outside of a vacuum chamber and the gas formed into plasma is introduced proximately to the specimen.
The degree of improvement of the etching rate according to this construction is 1.5 to 2 times as fast as a conventional case for instance. This value varies depending on a quality of a material to be etched and so on.
A second problem is that an etching rate is not constant, but a phenomenon in which the etching rate is decreased gradually with the progress of etching is presented frequently.
A third problem is that a material of an ion beam deflection plate or an ion beam retarding grid which is used for radiating only a selected neutral beam generated from an ion beam to a specimen is sputtered and incorporated into the specimen, thus causing metal contamination in semiconductor elements.
In case the material of the electrode or the grid is stainless steel or tungsten, contaminating metal is Fe, Ni, Cr, W and the like, which is not desirable to be introduced into a semiconductor element which is used as a specimen even if a very small amount.
A fourth problem is that, although a neutral beam etching is superior in directional etching, it causes disadvantage frequently. Particularly, it is required to apply etching on a surface provided with steps for accumulating a plurality types of elements and parts of constitute circuits in multilevel structures, but etching residue is liable to be produced along the steps.
It is an object of the present invention to provide a method and an apparatus of etching which solve or reduce four problems in a neutral beam etching technique described above.